SK Hynix has started testing what they call NAND QLC 4D CTF (Charge Trap Flash), with up to 1 Tb of storage per chip to facilitate the creation of high density devices. Calling this NAND 4D is not because the company makes fun of the laws of physics. It is still a type of 3D memory, but in this case SK Hynix has placed the circuits under the batteries to reduce the space of the pads.
This new design is already being sent to the manufacturers of SSD controllers such as Silicon Motion, which will be able to implement this new type of NAND in their SSD control circuits. Wallace Kou, president of Silicon Motion, has confirmed that they have received these samples and that they meet the requirements of the SSD for customers, apart from being impressive for their performance. However, SK Hynix also plans to produce QLC algorithms and controllers for the enterprise domain internally. The company expects that by 2023 the implementation of this type of memory will increase to 22%. By increasing the density of the chips, the memories can increase their storage and improve the price-GB ratio. The market continues to point to the widespread implementation of the SDD, and news such as the price reduction of large units does nothing but confirm it.